Aerial-Ground Collaborative Pathfinding with HLSTL using FPGAs
Computer Architecture and Networks Group, University of Castilla-La Mancha, Ciudad Real, Spain
manueljose.abaldea@uclm.es
Computer Architecture and Networks Group, University of Castilla-La Mancha, Ciudad Real, Spain
jesus.barba@uclm.es
Computer Architecture and Networks Group, University of Castilla-La Mancha, Ciudad Real, Spain
julian.caba@uclm.es
Computer Architecture and Networks Group, University of Castilla-La Mancha, Ciudad Real, Spain
soledad.escolar@uclm.es
Computer Architecture and Networks Group, University of Castilla-La Mancha, Ciudad Real, Spain
joseantonio.torre@uclm.es
Computer Architecture and Networks Group, University of Castilla-La Mancha, Ciudad Real, Spain
fernando.rincon@uclm.es
Computer Architecture and Networks Group, University of Castilla-La Mancha, Ciudad Real, Spain
juancarlos.lopez@uclm.es
CONFERENCE — Design of Circuits and Integrated Systems, (DCIS).
PAGES — 1-6
ISSN —
PUBLISHER —
YEAR — 2019
SM.J. Abaldea, J. Barba, J. Caba, S. Escolar, J.A. De la Torre, F. Rincón, J.C. López. Aerial-Ground Collaborative Pathfinding with HLSTL using FPGAs. 2019. Design of Circuits and Integrated Systems, (DCIS). Bilbao (Spain), 1-6.
@inproceedings{Abaldea2019,
title={Aerial-Ground Collaborative Pathfinding with HLSTL using FPGAs},
author={Abaldea, M.J. and Barba, J. and Caba, J. and Escolar, S. and de la Torre, J.A. and Rincon, F. and Lopez, J. C.},
booktitle={Design of Circuits and Integrated Systems, (DCIS)},
pages={1--6},
year={2019},
organization={}
}
Abstract
In this work, it is proposed an scenario of collaboration between an aerial and a terrestrial vehicles devoted to obtain the best possible route for the terrestrial vehicle, as well as the adaptation to possible unexpected situations on the ground. In order to get the best response time, a solution for real-time computing of the optimal routes is built on an FPGA-based device. Though the proposed system is applicable in multiple scenarios, this paper focuses on smart farming applications. The evolution of the design flows for high-performance, heterogeneous solutions has reached a high point with the widespread adoption of design flows based on High Level Synthesis (HLS) technology for FPGAs. However, the claim about the potential use of legacy code, or code written by non-FPGA experts, almost straightforwardly and smoothly, needs to be further developed. This work contributes to this objective, introducing the concept of a generic-programming framework for FPGA-based solutions. The HLS Template Library supports a quick and easy development flow from models written in standard high-level languages that make it use of software abstract data types. These structures are well-known artifacts provided by many software libraries such as Glib (ANSI C) or STL (C++) and are intensively used in multiple engineering and scientific fields.
