ARC2020 Keynote Speakers
David Merodio Codinachs
ASIC and FPGA Engineer
European Space Agency (ESA)
David Merodio Codinachs
FPGAs for space and their impact in space reconfigurability
Reconfigurability in space is an important capability for satellites that enables many scenarios, ranging from efficient reuse of equipment to failure recovery. FPGAs are key components in space equipment due to their versatility and performance to implement digital functions. They are currently embarked in satellites and used in many applications; such as observing the earth, provide telecommunications and navigation services as well as to contribute to science and explore the wider Universe. The FPGAs face very different conditions in space compared to the terrestrial applications, especially due to the radiation environment, which limit the selection of the FPGAs that can be used. A major limitation until recently was the use of one-time programmable FPGAs.
This talk will provide an overview of the use of FPGAs in ESA missions, the system reconfiguration aspects and the current limitations. The radiation effects in the FPGAs, how they are analysed, tested and mitigated will be shortly introduced to show the challenges that space mission face and how they are managed. The new re-programmable FPGAs for space will be introduced as well as the possibilities and evolution in reconfiguration.
David Merodio Codinachs is since 2005 an ASIC/FPGA engineer at the European Space Agency (ESA). He has been providing support on the use of FPGAs and digital ASICs to several ESA projects and missions – especially for Earth Observation, Telecom and Science – and has been serving as Technical Officer of the new European FPGA (BRAVE) and several R&D activities on radiation mitigation techniques addressing rad-tolerant and COTS FPGAs. He has been co-author of technical papers and has contributed to further dissemination and cooperation in the space community co-organising different workshops and giving invited talks.
Prior to joining ESA, he has been working as ASIC design consultant for Alcatel Bell (now Nokia) and Philips (now NXP) for microelectronics designs in telecommunications and medical/audio products. David holds an MSc in electronic engineering from Politecnico di Torino and an MSc in telecommunications engineering from Universitat Politècnica de Catalunya.
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