Synthesis of simulation and implementation code for OpenMAX multimedia heterogeneous systems from UML/MARTE models
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Computer Architecture and Networks Group, University of Castilla-La Mancha, Ciudad Real, Spain
Jesus.Barba@uclm.es
Computer Architecture and Networks Group, University of Castilla-La Mancha, Ciudad Real, Spain
JuanCarlos.Lopez@uclm.es
No disponemos de la información de contacto de este autor.
No disponemos de la información de contacto de este autor.
No disponemos de la información de contacto de este autor.
JOURNAL — Multimedia tools and Applications
PAGES — 1-32
ISSN — 1380-7501
DOI — 10.1007/s11042-016-3448-5
PUBLISHER — Springer
YEAR — 2016
@article{de2017synthesis,
title={Synthesis of simulation and implementation code for OpenMAX multimedia heterogeneous systems from UML/MARTE models},
author={de la Fuente, David and Barba, Jes{\'u}s and L{\'o}pez, Juan Carlos and Pe{\~n}il, Pablo and Posadas, H{\'e}ctor and Sanchez, P},
journal={Multimedia Tools and Applications},
volume={76},
number={6},
pages={8195--8226},
year={2017},
publisher={Springer}
}
Abstract
The design of multimedia systems is becoming a more and more challenging task due to the combination of growing functionalities and strict performance requirements along with reduced time-to-market. In this context, the OpenMAX initiative defines a standard interface for the development and interconnection of HW and SW multimedia components. However, the simulation and implementation steps required to obtain the final prototypes of such complex systems are still a challenge. To solve these problems, this paper presents a framework which enables automatic code generation from high-level UML/MARTE models. SystemC and VHDL codes are synthesized according to the OpenMAX specification requirements and they are integrated with the application SW, derived from task-based systems models. The generation of the SystemC executable specification enables easy simulation and verification of multimedia systems. After this verification stage, the framework automatically provides the VHDL code which feeds the final implementation and synthesis stage for the target platform. To demonstrate this approach, a SOBEL-based use case has been implemented with the developed framework.